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CMOS反向器版图 (3)

作者:未知   时间:2005-12-19 12:14:17  来自:网上转载  浏览次数:3133  文字大小:【】【】【

  • PMOS

Drawing the P-Diffusion (Active)


 

Now that we have drawn the NMOS transistor, the next step is to draw the PMOS transistor. The basic steps invloved in drawing the PMOS are the same.

1. Select pactive layer from the LSW

pselect

2. Draw a rectangle 3.6u by 1.2u

You can use the cursor keys and the zoom function to find yourself a place to build the transistor. Make sure you leave enough separation between the NMOS and the PMOS. Note that the PMOS transistor will also be sorrounded by the N-well region.

Draw pactive

Transistor Features


 

These three steps are identical to the ones done for the NMOS.

1. Draw the gate poly

poly

2. Place the contacts

contacts

3. Cover contacts with Metal-1

metal-1

The P-Select Layer


 

As with the NMOS transistor, the p-type doping (implantation) window over the active area must be defined using the n-pelect layer.

1. Select pselect layer from the LSW

pselect

2. Draw a rectangle that extends over the active area by 0.6u (2 lambda) in all directions.

pselect

Drawing the N-Well


 

In this process, the silicon substrate is originally doped with p-type impurities. NMOS transistors can be realized on this p-type substrate simply by creating n-type diffusion areas. For the PMOS transistors however a different approach must be taken: A larger n-type region (n-well) must be created, which acts like a substrate for the PMOS transistors.

From the process point of view, the n-well is one of the first structures to be formed on the surface during fabrication. Here we chose to draw the n-well after almost everything else is finished. Note that the drawing sequence of different layers in a mask layout is completely arbitrary, it does not have to follow the actual fabrication sequence.

1. Select the nwell layer from the LSW

Layout step

2. Draw a large n-well rectangle extending over the P-Diffusion

Layout step

The n-well must extend over the PMOS active area by a large margin, at least 1.8u (6 lambda)

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