4. Place the transistor

You can drop the selected object (in this case consisting of the n-well, the p-active, poly and contacts) into its final location by clicking once on the left mouse button.

Connecting the Output

1. Draw a Metal-1 rectangle between NMOS and PMOS drain region contacts

Note that the minimum Metal-1 width is 0.9u (3 lambda), thus narrower than the Metal-1 covering the contacts. Also note that the transistors are completely symmetric, the source and drain regions are interchangeable.

Connecting the Input

The next step will be to connect the gates of both transistors, which will form the input. To do this, we could use the rectangle command again, but this time we will use a different command, the path command. Throughout this tutorial, you will see that you typically have multiple options, commands or procedures available to create the same features in the layout. Please become familiar with as many of such options as possible.

1. Select poly layer from the LSW

2. From the Edit menu select Path
( Edit --> Path )

The path options box will pop up:

In the path mode you can draw lines (or paths) with the selected layer. The width of the drawn line can be adjusted, the default is the minimum width of the selected layer.

3. Start path

To start the path, click on the middle of the PMOS poly extension. You'll see a ghost line appear. Move this ghost line to the NMOS poly extension.

4. Double click to finish path

A single click will finish a line segment and let you continue drawing, a double click will finish the path.

Making a Metal-1 connection for the Input

 

We have already decided in our signal flow graph that we want the input in Metal-1. Therefore we have to make a connection from the poly layer to the Metal-1 layer.

This connection can be done manually by drawing a poly contact layer between Metal-1 and poly, but we will use the path command to automatically add the contacts.

1. Starting from the poly line connecting the gates, start drawing a horizontal poly path

2. On the Path Options dialog box, click on Change To Layer and switch to Metal1

This will automatically add a contact to the end of the current path, note that this will still be a ghost line. You can place the contact at a certain location by clicking once, thereafter the path will continue using the new layer.

3. Finish the path

You can finish the path by double clicking. Note that you will not be able to see the contact between the metal and poly layers, there will be a red square instead. This is called an instance. An instance is practically a finished layout that is included completely in your circuit. Since it is a complete layout, it is not possible to edit that layout from within your cell, it is said to be on a lower level of hierarchy.

By default, only the current layer of hierarchy is visible. Objects that you include as instances will be shown as boxes corresponding to their size. You can press SHIFT-F to see all levels of hierarchy. CTRL-F will return you to viewing only a single layer of hierarchy.

Power Rails

 

Now that our transistors are placed and connected, we will have to add Power and Ground rails. Usually a layout consists of a large number of cells, all of which need power and ground connections. Therefore it is common to design cells such that they will have one continous, wide power and ground connection when placed side by side.

Our Signal Flow Graph suggests horizontal power and ground lines in Metal-1.

1. Draw the Power Rail in Metal-1 above the PMOS

2. Draw the Ground Rail in Metal-1 below the NMOS

Make sure to connect the Power Rail and the Ground rail to the source contact of the PMOS and to that of NMOS, respectively.

P-Substrate Contact

 

The substrate on which the transistors are built must be properly biased. The way to do this is to add substrate contacts. The NMOS transistors are build on a p-type substrate, we will have to create a p-type substrate contact.

1. Draw a P-select square nect to the NMOS transistor.

Since the contact will be made to p-substrate, the contact area will have to be p-type.

2. Draw a P-active square inside the P-select area.

This will define the active area of the substrate contact. make sure that you are not violating any design rules associated with active area spacing.

3. Draw the active contact square inside the p-type active area.

4. Make a metal connection to ground, covering the entire substrate contact.

Note that the susbtrate contact can also be created and placed as an instance, instead of drawing every item seperately. this alternative approach will be demonstrated in the next step, for the n-well contact.

N-Substrate Contact

 

The PMOS transistor was placed within the n-well, this well also has to be biased with the VDD potential. THis will be done with an n-type substrate contact.

We can follow the same steps that we did for the p substrate contact, but we will try to introduce another method. Almost all of the interlayer connections are already available as instances in your design library. We used the metal-poly contact instance while connecting the input. Similar instances also exist for the substrate connections.

1. From the menu Create select option Instance
( Create --> Instance )

This will pop-up the instance options menu.

You'll have to provide a cell name and library here. It may be the case that you already know the cell name and cell view, but in this case it is better to Browse in your library to find the appropriate cell.

This is essentially the same library browser that you access when you start Cadence Design Tools. It lets you choose the library, cell and cell view, your selection will be transferred to the Instance options menu.

The N-substrate contact is named NTAP, and only has a symbolic view.

2. Move the instance to the desired location.

Once you have selected the instance, the cursor will show a ghost image representing the instance, and you'll be able to move the instance to the desired location:

3. Place the instance.

Once satisfied, you can click to place the instance. You'll remain in the instance mode after you have placed the instance, press "ESC" to go back to selection mode again. Note that in this example, the n-well contact has been placed right on top of the n-well boundary, which will obviously generate a rul eviolation. the n-well is simply not wide enough to accomodate both the PMOS transistor and rge contact. This will have to be dealt with in the next step.

4. Make the power connection.

The instance will not automatically connect itself to the power supply rail. This connection has to be made by either a Metal-1 rectangle or path.

 

Enclosing the substrate contact

 

In the previous step we tried to place the n-type substrate contact in the n-well. Since we had drawn the n-well to cover the P-diffusion at minimum length, the well is not wide enough to accomodate the additional contact. We must enlarge the n-well, so that it also covers the substrate contact.

One way to do this would be to simply draw an adjoining rectangle using the n-well layer. Instead, we will try to modify the existing rectangle, so that it covers the contact.

1. Press F4 on the keyboard to toggle selection mode.

By default, the selection mode will only select whole objects. Pressing "F4" will change this default to partial selection. The information bar will start displaying "(P) Select" (P for partial) instead of "(F) Select" (F for Full).

2. Move cursor over the left edge of the n-well.

You'll notice that as soon as the cursor is close to the edge, only the edge line will be highlighted as a pale dashed line.

3. Click once to select the edge.

3. Move mouse over the selected edge (without pressing any mouse buttons).

You'll notice that the cursor changes shape when you are close to the edge.

4. Press and hold left mouse button when cursor changes above the selected edge.

You have grabbed the edge, and as long as you do not release the mouse button you can "stretch" the edge. Move the edge of the n-well so that all the of the substrate contact is covered by n-well.