1.Read the design data

set search_path

set link_path

 

read_verilog  {adder.v full_adder.v half_adder.v}

link_design  full_adder  //important

read_vcd  -stript_path top/adder/adder_bit1 ../sim/adder.vcd

 

// link_design full_adder , the full_adder is  a full adder module

// read_vcd  , the adder_bit1 is a instance of full_adder

//so when u want to anaylse a part of design, u must link_design use the module name and read_vcd use the instance name

 

 

read_db

 

2.Read parasitics

read_parasitics //important

 

3.Read in the activity file

read_vcd //important

 

4.Calculate power

set_operating_conditions

set_waveform_options

calculate_power

 

 

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i dont know why the command read_saif and vcd2saif cant not execute in pp_shell  but the document have 2 commands manu.

now i know that the above 2 commands r cshell command,not be executed in pp.